This book addresses the automatic sizing and layout of analog integrated circuits (ICs) using deep learning (DL) and artificial neural networks (ANN). It explores an innovative approach to automatic circuit sizing where ANNs learn patterns from previously optimized design solutions. In opposition to classical optimization-based sizing strategies, where computational intelligence techniques are used to iterate over the map from devices’ sizes to circuits’ performances provided by design equations or circuit simulations, ANNs are shown to be capable of solving analog IC sizing as a direct map from specifications to the devices’ sizes. Two separate ANN architectures are proposed: a Regression-only model and a Classification and Regression model. The goal of the Regression-only model is to learn design patterns from the studied circuits, using circuit’s performances as input features and devices’ sizes as target outputs. This model can size a circuit given its specifications for a single topology. The Classification and Regression model has the same capabilities of the previous model, but it can also select the most appropriate circuit topology and its respective sizing given the target specification. The proposed methodology was implemented and tested on two analog circuit topologies.

In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the sizing task of RF IC design, which is used in two different steps of the automatic design process. The advances in telecommunications, such as the 5th generation broadband or 5G for short, open doors to advances in areas such as health care, education, resource management, transportation, agriculture and many other areas. Consequently, there is high pressure in today’s market for significant communication rates, extensive bandwidths and ultralow-power consumption. This is where radiofrequency (RF) integrated circuits (ICs) come in hand, playing a crucial role. This demand stresses out the problem which resides in the remarkable difficulty of RF IC design in deep nanometric integration technologies due to their high complexity and stringent performances. Given the economic pressure for high quality yet cheap electronics and challenging time-to-market constraints, there is an urgent need for electronic design automation (EDA) tools to increase the RF designers’ productivity and improve the quality of resulting ICs. In the last years, the automatic sizing of RF IC blocks in deep nanometer technologies has moved toward process, voltage and temperature (PVT)-inclusive optimizations to ensure their robustness. Each sizing solution is exhaustively simulated in a set of PVT corners, thus pushing modern workstations’ capabilities to their limits. Standard ANNs applications usually exploit the model’s capability of describing a complex, harder to describe, relation between input and target data. For that purpose, ANNs are a mechanism to bypass the process of describing the complex underlying relations between data by feeding it a significant number of previously acquired input/output data pairs that the model attempts to copy. Here, and firstly, the ANNs disrupt from the most recent trials of replacing the simulator in the simulation-based sizing with a machine/deep learning model, by proposing two different ANNs, the first classifies the convergence of the circuit for nominal and PVT corners, and the second predicts the oscillating frequencies for each case. The convergence classifier (CCANN) and frequency guess predictor (FGPANN) are seamlessly integrated into the simulation-based sizing loop, accelerating the overall optimization process. Secondly, a PVT regressor that inputs the circuit’s sizing and the nominal performances to estimate the PVT corner performances via multiple parallel artificial neural networks is proposed. Two control phases prevent the optimization process from being misled by inaccurate performance estimates. As such, this book details the optimal description of the input/output data relation that should be fulfilled. The developed description is mainly reflected in two of the system’s characteristics, the shape of the input data and its incorporation in the sizing optimization loop. An optimal description of these components should be such that the model should produce output data that fulfills the desired relation for the given training data once fully trained. Additionally, the model should be capable of efficiently generalizing the acquired knowledge in newer examples, i.e., never-seen input circuit topologies.

Enables the reader to test an analog circuit that is implemented either in bipolar or MOS technology. Examines the testing and fault diagnosis of analog and analog part of mixed signal circuits. Covers the testing and fault diagnosis of both bipolar and Metal Oxide Semiconductor (MOS) circuits and introduces . Also contains problems that can be used as quiz or homework.

This book applies to the scientific area of electronic design automation (EDA) and addresses the automatic sizing of analog integrated circuits (ICs). Particularly, this book presents an approach to enhance a state-of-the-art layout-aware circuit-level optimizer (GENOM-POF), by embedding statistical knowledge from an automatically generated gradient model into the multi-objective multi-constraint optimization kernel based on the NSGA-II algorithm. The results showed allow the designer to explore the different trade-offs of the solution space, both through the achieved device sizes, or the respective layout solutions.

Symbolic Analysis in Analog Integrated Circuit Design provides an introduction to computer-aided circuit analysis and presents systematic methods for solving linear (i.e. small-signal) and nonlinear circuit problems, which are illustrated by concrete examples. Computer-aided symbolic circuit analysis is useful in analog integrated circuit design. Analytic expressions for the network transfer functions contain information that is not provided by a numerical simulation result. However, these expressions are generally extremely long and difficult to interpret; therefore, it is necessary to be able to approximate them guided by the magnitude of the individual circuit parameters. Engineering has been described as `the art of making approximations'. The inclusion of symbolic analysis in analog circuit design reduces the implied risk of ambiguity during the approximation process. A systematic method based on the nullor concept is used to obtain the basic feedback transistor amplifier configurations. Approximate expressions for the locations of poles and zeros for linear networks are obtained using the extended pole-splitting technique. An unusual feature in Symbolic Analysis in Analog Integrated Circuit Design is the consistent use of the transadmittance element with finite (linear or nonlinear) or infinite (i.e. nullor) gain as the only requisite circuit element. The describing function method is used to obtain approximate symbolic expressions for the harmonic distortion generated by a soft or hard transconductance nonlinearity embedded in an arbitrary linear network. The design and implementation of a program (i.e. CASCA) for symbolic analysis of time-continuous networks is described. The algorithms can also be used to solve other linear problems, e.g. the analysis of time-discrete switched-capacitor networks. Symbolic Analysis in Analog Integrated Circuit Design serves as an excellent resource for students and researchers as well as for industry designers who want to familiarize themselves with circuit analysis. This book may also be used for advanced courses on the subject.

Design Automation Methods and Tools for Microfluidics-Based Biochips deals with all aspects of design automation for microfluidics-based biochips. Experts have contributed chapters on many aspects of biochip design automation. Topics covered include: device modeling; adaptation of bioassays for on-chip implementations; numerical methods and simulation tools; architectural synthesis, scheduling and binding of assay operations; physical design and module placement; fault modeling and testing; and reconfiguration methods.

Advances in Semiconductor Technologies Discover the broad sweep of semiconductor technologies in this uniquely curated resource Semiconductor technologies and innovations have been the backbone of numerous different fields: electronics, online commerce, the information and communication industry, and the defense industry. For over fifty years, silicon technology and CMOS scaling have been the central focus and primary driver of innovation in the semiconductor industry. Traditional CMOS scaling has approached some fundamental limits, and as a result, the pace of scientific research and discovery for novel semiconductor technologies is increasing with a focus on novel materials, devices, designs, architectures, and computer paradigms. In particular, new computing paradigms and systems—such as quantum computing, artificial intelligence, and Internet of Things—have the potential to unlock unprecedented power and application space. Advances in Semiconductor Technologies provides a comprehensive overview of selected semiconductor technologies and the most up-to-date research topics, looking in particular at mainstream developments in current industry research and development, from emerging materials and devices, to new computing paradigms and applications. This full-coverage volume gives the reader valuable insights into state-of-the-art advances currently being fabricated, a wide range of novel applications currently under investigation, and a glance into the future with emerging technologies in development. Advances in Semiconductor Technologies readers will also find: A comprehensive approach that ensures a thorough understanding of state-of-the-art technologies currently being fabricated Treatments on all aspects of semiconductor technologies, including materials, devices, manufacturing, modeling, design, architecture, and applications Articles written by an impressive team of international academics and industry insiders that provide unique insights into a wide range of topics Advances in Semiconductor Technologies is a useful, time-saving reference for electrical engineers working in industry and research, who are looking to stay abreast of rapidly advancing developments in semiconductor electronics, as well as academics in the field and government policy advisors.

Various approaches for finding optimal values for the parameters of analog cells have made their entrance in commercial applications. However, a larger impact on the performance is expected if tools are developed which operate on a higher abstraction level and consider multiple architectural choices to realize a particular functionality. This book examines the opportunities, conditions, problems, solutions and systematic methodologies for this new generation of analog CAD tools.

​This book serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification. Experts from academia and industry cover a wide range of the latest research on ML applications in electronic design automation (EDA), including analysis and optimization of digital design, analysis and optimization of analog design, as well as functional verification, FPGA and system level designs, design for manufacturing (DFM), and design space exploration. The authors also cover key ML methods such as classical ML, deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO). All of these topics are valuable to chip designers and EDA developers and researchers working in digital and analog designs and verification.