This comprehensive compendium describes the basic modeling techniques for silicon-based semiconductor devices, introduces the basic concepts of silicon-based passive and active devices, and provides its state-of-the-art modeling and equivalent circuit parameter extraction methods.The unique reference text benefits practicing engineers, technicians, senior undergraduate and first-year graduate students working in the areas of RF, microwave and solid-state device, and integrated circuit design.

CMOS technology has now reached a state of evolution, in terms of both frequency and noise, where it is becoming a serious contender for radio frequency (RF) applications in the GHz range. Cutoff frequencies of about 50 GHz have been reported for 0.18 æm CMOS technology, and are expected to reach about 100 GHz when the feature size shrinks to 100 nm within a few years. This translates into CMOS circuit operating frequencies well into the GHz range, which covers the frequency range of many of today's popular wireless products, such as cell phones, GPS (Global Positioning System) and Bluetooth. Of course, the great interest in RF CMOS comes from the obvious advantages of CMOS technology in terms of production cost, high-level integration, and the ability to combine digital, analog and RF circuits on the same chip. This book discusses many of the challenges facing the CMOS RF circuit designer in terms of device modeling and characterization, which are crucial issues in circuit simulation and design.

Do you want to deepen your understanding of complex systems and design integrated circuits more quickly? Learn how with this step-by-step guide that shows, from first principles, how to employ estimation techniques to analyze and solve complex problems in IC design using a simplified modeling approach. Applications are richly illustrated using real-world examples from across IC design, from simple circuit theory, to the electromagnetic effects and high frequency design, and systems such as data converters and phase-locked loops. Basic concepts like inductance and capacitance are related to one other and other RF phenomena inside a modern chip, enhancing understanding without the need for simulators. Use the easy-to-follow models presented to start designing your own products, from inductors and amplifiers to more complex systems. Whether you are an early-career professional or researcher, graduate student, or established IC engineer looking to reduce your reliance on commercial software packages, this is essential reading.

The first book on the topic, this is a comprehensive introduction to the modeling and design of junctionless field effect transistors (FETs). Beginning with a discussion of the advantages and limitations of the technology, the authors also provide a thorough overview of published analytical models for double-gate and nanowire configurations, before offering a general introduction to the EPFL charge-based model of junctionless FETs. Important features are introduced gradually, including nanowire versus double-gate equivalence, technological design space, junctionless FET performances, short channel effects, transcapacitances, asymmetric operation, thermal noise, interface traps, and the junction FET. Additional features compatible with biosensor applications are also discussed. This is a valuable resource for students and researchers looking to understand more about this new and fast developing field.

The first book to deal with a broad spectrum of process and device design, and modeling issues related to semiconductor devices, bridging the gap between device modelling and process design using TCAD. Presents a comprehensive perspective of emerging fields and covers topics ranging from materials to fabrication, devices, modelling and applications. Aimed at research-and-development engineers and scientists involved in microelectronics technology and device design via Technology CAD, and TCAD engineers and developers.

Industry Standard FDSOI Compact Model BSIM-IMG for IC Design helps readers develop an understanding of a FDSOI device and its simulation model. It covers the physics and operation of the FDSOI device, explaining not only how FDSOI enables further scaling, but also how it offers unique possibilities in circuits. Following chapters cover the industry standard compact model BSIM-IMG for FDSOI devices. The book addresses core surface-potential calculations and the plethora of real devices and potential effects. Written by the original developers of the industrial standard model, this book is an excellent reference for the new BSIM-IMG compact model for emerging FDSOI technology. The authors include chapters on step-by-step parameters extraction procedure for BSIM-IMG model and rigorous industry grade tests that the BSIM-IMG model has undergone. There is also a chapter on analog and RF circuit design in FDSOI technology using the BSIM-IMG model. - Provides a detailed discussion of the BSIM-IMG model and the industry standard simulation model for FDSOI, all presented by the developers of the model - Explains the complex operation of the FDSOI device and its use of two independent control inputs - Addresses the parameter extraction challenges for those using this model

This might be the first book that deals mostly with the 3D technology computer-aided design (TCAD) simulations of major state-of-the-art stress- and strain-engineered advanced semiconductor devices: MOSFETs, BJTs, HBTs, nonclassical MOS devices, finFETs, silicon-germanium hetero-FETs, solar cells, power devices, and memory devices. The book focuses on how to set up 3D TCAD simulation tools, from mask layout to process and device simulation, including design for manufacturing (DFM), and from device modeling to SPICE parameter extraction. The book also offers an innovative and new approach to teaching the fundamentals of semiconductor process and device design using advanced TCAD simulations of various semiconductor structures. The simulation examples chosen are from the most popular devices in use today and provide useful technology and device physics insights. To extend the role of TCAD in today’s advanced technology era, process compact modeling and DFM issues have been included for design–technology interface generation. Unique in approach, this book provides an integrated view of silicon technology and beyond—with emphasis on TCAD simulations. It is the first book to provide a web-based online laboratory for semiconductor device characterization and SPICE parameter extraction. It describes not only the manufacturing practice associated with the technologies used but also the underlying scientific basis for those technologies. Written from an engineering standpoint, this book provides the process design and simulation background needed to understand new and future technology development, process modeling, and design of nanoscale transistors. The book also advances the understanding and knowledge of modern IC design via TCAD, improves the quality in micro- and nanoelectronics R&D, and supports the training of semiconductor specialists. It is intended as a textbook or reference for graduate students in the field of semiconductor fabrication and as a reference for engineers involved in VLSI technology development who have to solve device and process problems. CAD specialists will also find this book useful since it discusses the organization of the simulation system, in addition to presenting many case studies where the user applies TCAD tools in different situations.

This book discusses the evolution of multigate transistors, the design challenges of transistors for high-frequency applications, and the design and modeling of multigate transistors for high-frequency applications. The contents particularly focus on the cut-off frequency and maximum oscillation frequency of different multigate structures. RF stability modeling for multigate transistors is presented, which can help to understand the relation between the small-signal parameter and the physical parameter of the device for optimization. This is a useful reference to those in academia and industry.

What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of ten years ago, technological advancements have accelerated to today's FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes after it? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly model future devices. We invite insight from investigators and scientists in the field to showcase their work in this Special Issue with research papers, short communications, and review articles that focus on trends in micro- and nanotechnology from fundamental research to applications.

Bridges the gap between device modelling and analog circuit design. Includes dedicated software enabling actual circuit design. Covers the three significant models: BSIM3, Model 9 &, and EKV. Presents practical guidance on device development and circuit implementation. The authors offer a combination of extensive academic and industrial experience.