With its comprehensive coverage, this reference introduces readers to the wide topic of resistance switching, providing the knowledge, tools, and methods needed to understand, characterize and apply resistive switching memories. Starting with those materials that display resistive switching behavior, the book explains the basics of resistive switching as well as switching mechanisms and models. An in-depth discussion of memory reliability is followed by chapters on memory cell structures and architectures, while a section on logic gates rounds off the text. An invaluable self-contained book for materials scientists, electrical engineers and physicists dealing with memory research and development.

This book offers a thorough exploration of the three-dimensional integration of resistive memory in all aspects, from the materials, devices, array-level issues, and integration structures to its applications. Resistive random-access memory (RRAM) is one of the most promising candidates for next-generation nonvolatile memory applications owing to its superior characteristics including simple structure, high switching speed, low power consumption, and compatibility with standard complementary metal oxide semiconductor (CMOS) process. To achieve large-scale, high-density integration of RRAM, the 3D cross array is undoubtedly the ideal choice. This book introduces the 3D integration technology of RRAM, and breaks it down into five parts: 1: Associative Problems in Crossbar array and 3D architectures; 2: Selector Devices and Self-Selective Cells; 3: Integration of 3D RRAM; 4: Reliability Issues in 3D RRAM; 5: Applications of 3D RRAM beyond Storage. The book aspires to provide a relevant reference for students, researchers, engineers, and professionals working with resistive random-access memory or those interested in 3D integration technology in general.

This Handbook presents all aspects of memristor networks in an easy to read and tutorial style. Including many colour illustrations, it covers the foundations of memristor theory and applications, the technology of memristive devices, revised models of the Hodgkin-Huxley Equations and ion channels, neuromorphic architectures, and analyses of the dynamic behaviour of memristive networks. It also shows how to realise computing devices, non-von Neumann architectures and provides future building blocks for deep learning hardware. With contributions from leaders in computer science, mathematics, electronics, physics, material science and engineering, the book offers an indispensable source of information and an inspiring reference text for future generations of computer scientists, mathematicians, physicists, material scientists and engineers working in this dynamic field.

This book provides a comprehensive overview of current research on memristors, memcapacitors and, meminductors. In addition to an historical overview of the research in this area, coverage includes the theory behind memristive circuits, as well as memcapacitance, and meminductance. Details are shown for recent applications of memristors for resistive random access memories, neuromorphic systems and hybrid CMOS/memristor circuits. Methods for the simulation of memristors are demonstrated and an introduction to neuromorphic modeling is provided.

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Combining solid state devices with electronic circuits for an introductory-level microelectronics course, this textbook offers an integrated approach so that students can truly understand how a circuit works. A concise writing style is employed, with the right level of detail and physics to help students understand how a device works. Other features include an emphasis on modelling of electronic devices, and analysis of non-linear circuits. Spice problems, worked examples and end-of-chapter problems are included.

The large scale integration and planar scaling of individual system chips is reaching an expensive limit. If individual chips now, and later terrabyte memory blocks, memory macros, and processing cores, can be tightly linked in optimally designed and processed small footprint vertical stacks, then performance can be increased, power reduced and cost contained. This book reviews for the electronics industry engineer, professional and student the critical areas of development for 3D vertical memory chips including: gate-all-around and junction-less nanowire memories, stacked thin film and double gate memories, terrabit vertical channel and vertical gate stacked NAND flash, large scale stacking of Resistance RAM cross-point arrays, and 2.5D/3D stacking of memory and processor chips with through-silicon-via connections now and remote links later. Key features: Presents a review of the status and trends in 3-dimensional vertical memory chip technologies. Extensively reviews advanced vertical memory chip technology and development Explores technology process routes and 3D chip integration in a single reference