Wireless Receiver Architectures and Design presents the various designs and architectures of wireless receivers in the context of modern multi-mode and multi-standard devices. This one-stop reference and guide to designing low-cost low-power multi-mode, multi-standard receivers treats analog and digital signal processing simultaneously, with equal detail given to the chosen architecture and modulating waveform. It provides a complete understanding of the receiver's analog front end and the digital backend, and how each affects the other. The book explains the design process in great detail, starting from an analysis of requirements to the choice of architecture and finally to the design and algorithm development. The advantages and disadvantages of each wireless architecture and the suitability to a standard are given, enabling a better choice of design methodology, receiver lineup, analog block, and digital algorithm for a particular architecture. Whether you are a communications engineer working in system architecture and waveform design, an RF engineer working on noise and linearity budget and line-up analysis, a DSP engineer working on algorithm development, or an analog or digital design engineer designing circuits for wireless transceivers, this book is your one-stop reference and guide to designing low-cost low-power multi-mode multi-standard receivers. The material in this book is organized and presented to lead you from applied theory to practical design with plenty of examples and case studies drawn from modern wireless standards. - Provides a complete description of receiver architectures together with their pros and cons, enabling a better choice of design methodology - Covers the design trade-offs and algorithms between the analog front end and the digital modem – enabling an end-to-end design approach - Addresses multi-mode multi-standard low-cost, low-power radio design – critical for producing the applications for Smart phones and portable internet devices

Current advances in wireless receiver technologies are primarily driven by the need for cost reduction through (1) integration of a radio, an ADC and a digital processor on a single CMOS die, and (2) the design of low-power multi-standard capable receivers. However, due to the spectrum scarcity, future wireless standards, such as LTE, present a whole new set of challenges for radio system design. For example, LTE's highly fragmented spectrum requires multiple chipsets for support. Due to this cost overhead, there is no global LTE-enabled device available in the market now. Moreover, while carrier aggregation (CA) added to LTE brings unparalleled data rate improvement, it seriously complicates the RF frontend design. Modern commercial LTE solutions include multiple chipsets to support various scenarios of CA, which is not cost effective. This work focuses on novel receiver architectures that address the design challenges associated with LTE-Advance from two perspectives: (1) a receiver that is capable of wide-frequency range of operation to cover all the LTE bands and (2) a single highly linear RF frontend to support non-contiguous-in-band CA. A novel sigma-delta-based direct-RF-to-digital receiver architecture is introduced in this work as an example of a complete integrated RF-to-digital frontend design capable to cover all the LTE bands. The design is implemented in 65 nm CMOS technology and the SNDR of the receiver exceeds 68 dB for a 4 MHz signal, and is better than 60 dB over the 400 MHz to 4 GHz frequency range. In a different example, we propose a passive-mixer-first receiver system to provide CA support in a cost-effective and power-efficient manner. Mixer-first receiver's superb linearity performance enables the possibility of a single receiver processing the entire LTE RX band, while most of the signal conditioning can be pushed into DSP to enjoy the benefit of process scaling. This design has been demonstrated in a 28 nm bulk CMOS technology, and the overall system achieves 3 dB NF, 15 dBm IIP3 and 35 dB gain with 60 mW of power.

The insatiable demand for high-speed real-time computer connectivity anywhere, any time, fuelled by the wide-spreading acceptance of Internet Protocol, has accelerated the birth of a large number of wireless data networks. Wireless Transceiver Design provides a comprehensive, practical, self-contained and friendly guide to theoretical and practical modern wireless modem & transceiver design for experienced radio and communication engineers and students. This book will enable readers to fully understand the specifications that characterize the performance of modern wireless modems and transceivers as a whole system, learn how to measure each one of them, and discover how they depend on (one or more) components and subsystems in the various architectures of widespread use. It discusses the important figures related to off-the-shelf radio-frequency and baseband super-components and explains how to measure them to fully evaluate applicability and limitations. Key Features: Readers will learn to master the design, analysis and measurement of important and hard-to-achieve parameters, such as phase noise of oscillators, peak-to-average and linearity of radio-frequency power amplifiers, amplitude and phase balance of quadrature channels and radiated spurious emission Written so that each chapter is self contained and suitable to be consulted on an ad-hoc basis as a reference The lesser covered topic of ‘parasitic phenomena’, the cause of many major after-market disasters, is addressed The material is treated with in-depth mathematical approach, whilst avoiding unnecessarily obscure discussions Suitable as the basis for advanced under-graduate and post-graduate engineering courses, as well as a comprehensive reference, this book will be of interest to those involved in R&D in the fields of engineering and computer sciences, radio engineers working on cellular products and system engineers in the wireless arena, as well as professors and lecturers in the field of communications, undergraduate and post-graduate students in engineering, computer sciences and system engineering.

The Second Edition of OFDM Baseband Receiver Design for Wirless Communications, this book expands on the earlier edition with enhanced coverage of MIMO techniques, additional baseband algorithms, and more IC design examples. The authors cover the full range of OFDM technology, from theories and algorithms to architectures and circuits. The book gives a concise yet comprehensive look at digital communication fundamentals before explaining signal processing algorithms in receivers. The authors give detailed treatment of hardware issues - from architecture to IC implementation. Links OFDM and MIMO theory with hardware implementation Enables the reader to transfer communication received concepts into hardware; design wireless receivers with acceptable implemntation loss; achieve low-power designs Covers the latest standards, such as DVB-T2, WiMax, LTE and LTE-A Includes more baseband algorithms, like soft-decoding algorithms such as BCJR and SOVA Expanded treatment of channel models, detection algorithms and MIMO techniques Features concrete design examples of WiMAX systems and cognitive radio apllications Companion website with lecture slides for instructors Based on materials developed for a course in digital communication IC design, this book is ideal for graduate students and researchers in VLSI design, wireless communications, and communications signal processing. Practicing engineers working on algorithms or hardware for wireless communications devices will also find this to be a key reference.

This book is for RF Engineers and, in particular, those engineers focusing mostly on RF systems and RFIC design. The author develops systematic methods for RF systems design, complete with a comprehensive set of design formulas. Its focus on mobile station transmitter and receiver system design also applies to transceiver design of other wireless systems such as WLAN. This comprehensive reference work covers a wide range of topics from general principles of communication theory, as it applies to digital radio designs to specific examples on implementing multimode mobile systems.

Practical lessons and approaches in radio receiver design for wireless communication systems are the hallmarks of Wireless Receiver Design for Digital Communications, 2nd Edition. Decades of experience 'at the bench' are collected within and the book acts as a virtual replacement for a mentor who teaches basic concepts from a practical perspective and has the war stories that help their 'apprentice' avoid the mistakes of the past.

Architectures BABAK MATINPOUR and JOY LASKAR * Describes the actual implementation of receiver architectures from the initial design to an IC-based product * Presents many tricks-of-the-trade not usually covered in textbooks * Covers a range of practical issues including semiconductor technology selection, cost versus performance, yield, packaging, prototype development, testing, and analysis * Discusses architectures that are employed in modern broadband wireless systems

Orthogonal frequency-division multiplexing (OFDM) access schemes are becoming more prevalent among cellular and wireless broadband systems, accelerating the need for smaller, more energy efficient receiver solutions. Up to now the majority of OFDM texts have dealt with signal processing aspects. To address the current gap in OFDM integrated circuit (IC) instruction, Chiueh and Tsai have produced this timely text on baseband design. OFDM Baseband Receiver Design for Wireless Communications covers the gamut of OFDM technology, from theories and algorithms to architectures and circuits. Chiueh and Tsai give a concise yet comprehensive look at digital communications fundamentals before explaining modulation and signal processing algorithms in OFDM receivers. Moreover, the authors give detailed treatment of hardware issues -- from design methodology to physical IC implementation. Closes the gap between OFDM theory and implementation Enables the reader to transfer communication receiver concepts into hardware design wireless receivers with acceptable implementation loss achieve low-power designs Contains numerous figures to illustrate techniques Features concrete design examples of MC-CDMA systems and cognitive radio applications Presents theoretical discussions that focus on concepts rather than mathematical derivation Provides a much-needed single source of material from numerous papers Based on course materials for a class in digital communication IC design, this book is ideal for advanced undergraduate or post-graduate students from either VLSI design or signal processing backgrounds. New and experienced engineers in industry working on algorithms or hardware for wireless communications devices will also find this book to be a key reference.

In einem sogenannten Software-Radio werden die Modulations-Wellenformen nicht durch herkömmliche elektronische Schaltungen, sondern durch eine Software erzeugt. Die so generierten digitalen Signale werden durch einen Breitband-D/A-Wandler in das gewünschte analoge modulierte Signal überführt. Grundlagen und Anwendungen der Technologie erläutert der Autor dieses Bandes, gestützt auf jahrelange Erfahrungen als Seminarleiter. (11/00)

This book provides readers with a state-of-the-art description of techniques to be used for ultra-low-power (ULP) and ultra-low-cost (ULC), short-range wireless receivers. Readers will learn what is required to deploy these receivers in short-range wireless sensor networks, which are proliferating widely to serve the internet of things (IoT) for “smart cities.” The authors address key challenges involved with the technology and the typical tradeoffs between ULP and ULC. Three design examples with advanced circuit techniques are described in order to address these trade-offs, which special focus on cost minimization. These three techniques enable respectively, cascading of radio frequency (RF) and baseband (BB) circuits under an ultra-low-voltage (ULV) supply, cascading of RF and BB circuits in current domain for current reuse and a novel function-reuse receiver architecture, suitable for ULV and multi-band ULP applications such as the sub-GHz ZigBee.