This comprehensive reference text discusses novel semiconductor devices, including nanostructure field-effect transistors, photodiodes, high electron mobility transistors, and oxide-based devices. The text covers submicron semiconductor devices, device modeling, novel materials for devices, novel semiconductor devices, optimization techniques, and their application in detail. It covers such important topics as negative capacitance devices, surface-plasmon resonance devices, Fermi-level pinning, external stimuli-based optimization techniques, optoelectronic devices, and architecture-based optimization techniques. The book: Covers novel semiconductor devices with submicron dimensions Discusses comprehensive device optimization techniques Examines conceptualization and modeling of semiconductor devices Covers circuit and sensor-based application of the novel devices Discusses novel materials for next-generation devices This text will be useful for graduate students and professionals in fields including electrical engineering, electronics and communication engineering, materials science, and nanoscience.

The papers contained in the volume represent lectures delivered as a 1983 NATO ASI, held at Urbino, Italy. The lecture series was designed to identify the key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibrium transport, quantum transport, interfacial and size constraints issues were also highlighted. The ASI was supported by NATO and the European Research Office. H. L. Grubin D. K. Ferry C. Jacoboni v CONTENTS MODELLING OF SUB-MICRON DEVICES.................. .......... 1 E. Constant BOLTZMANN TRANSPORT EQUATION... ... ...... .................... 33 K. Hess TRANSPORT AND MATERIAL CONSIDERATIONS FOR SUBMICRON DEVICES. . .. . . . . .. . . . .. . .. . .... ... .. . . . .. . . . .. . . . . . . . . . . 45 H. L. Grubin EPITAXIAL GROWTH FOR SUB MICRON STRUCTURES.................. 179 C. E. C. Wood INSULATOR/SEMICONDUCTOR INTERFACES.......................... 195 C. W. Wilms en THEORY OF THE ELECTRONIC STRUCTURE OF SEMICONDUCTOR SURFACES AND INTERFACES......................................... 223 C. Calandra DEEP LEVELS AT COMPOUND-SEMICONDUCTOR INTERFACES........... 253 W. Monch ENSEMBLE MONTE CARLO TECHNIqUES............................. 289 C. Jacoboni NOISE AND DIFFUSION IN SUBMICRON STRUCTURES................. 323 L. Reggiani SUPERLATTICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361 . . . . . . . . . . . . K. Hess SUBMICRON LITHOGRAPHY 373 C. D. W. Wilkinson and S. P. Beaumont QUANTUM EFFECTS IN DEVICE STRUCTURES DUE TO SUBMICRON CONFINEMENT IN ONE DIMENSION.... ....................... 401 B. D. McCombe vii viii CONTENTS PHYSICS OF HETEROSTRUCTURES AND HETEROSTRUCTURE DEVICES..... 445 P. J. Price CORRELATION EFFECTS IN SHORT TIME, NONS TAT I ONARY TRANSPORT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477 . . . . . . . . . . . . J. J. Niez DEVICE-DEVICE INTERACTIONS............ ...................... 503 D. K. Ferry QUANTUM TRANSPORT AND THE WIGNER FUNCTION................... 521 G. J. Iafrate FAR INFRARED MEASUREMENTS OF VELOCITY OVERSHOOT AND HOT ELECTRON DYNAMICS IN SEMICONDUCTOR DEVICES............. 577 S. J. Allen, Jr.

The aim of this book is to resolve the problem of electron and hole transport with a coherent and consistent theory that is relevant to the understanding of transport phenomena in submicron devices. Along the road, readers encounter landmarks in theoretical physics as the authors guide them through the strong and weak aspects of various hypotheses.

This comprehensive reference text discusses novel semiconductor devices, including nanostructure field-effect transistors, photodiodes, high electron mobility transistors, and oxide-based devices. The text covers submicron semiconductor devices, device modeling, novel materials for devices, novel semiconductor devices, optimization techniques, and their application in detail. It covers such important topics as negative capacitance devices, surface-plasmon resonance devices, Fermi-level pinning, external stimuli-based optimization techniques, optoelectronic devices, and architecture-based optimization techniques. The book: Covers novel semiconductor devices with submicron dimensions Discusses comprehensive device optimization techniques Examines conceptualization and modeling of semiconductor devices Covers circuit and sensor-based application of the novel devices Discusses novel materials for next-generation devices This text will be useful for graduate students and professionals in fields including electrical engineering, electronics and communication engineering, materials science, and nanoscience.

In November 2001 the Mathematical Research Center at Oberwolfach, Germany, hosted the third Conference on Mathematical Models and Numerical Simulation in Electronic Industry. It brought together researchers in mathematics, electrical engineering and scientists working in industry.The contributions to this volume try to bridge the gap between basic and applied mathematics, research in electrical engineering and the needs of industry.

The purposes of this book are many. First, we must point out that it is not a device book, as a proper treatment of the range of important devices would require a much larger volume even without treating the important physics for submicron devices. Rather, the book is written principally to pull together and present in a single place, and in a (hopefully) uniform treatment, much of the understanding on relevant physics for submicron devices. Indeed, the understand ing that we are trying to convey through this work has existed in the literature for quite some time, but has not been brought to the full attention of those whose business is the making of submicron devices. It should be remarked that much of the important physics that is discussed here may not be found readily in devices at the 1.0-JLm level, but will be found to be dominant at the O.I-JLm level. The range between these two is rapidly being covered as technology moves from the 256K RAM to the 16M RAM chips.