As chips continue to scale, power integrity issues are introducing unexpected project complexity and cost. In this book, two leading industry innovators thoroughly discuss the power integrity challenges that engineers face in designing at nanoscale levels, introduce new analysis and management techniques for addressing these issues, and provide breakthrough tools for hands-on problem solving. --

With the inclusion of the two new hot topics in signal integrity, power integrity and high speed serial links, this book will be the most up to date complete guide to understanding and designing for signal integrity.

The First Comprehensive, Example-Rich Guide to Power Integrity Modeling Professionals such as signal integrity engineers, package designers, and system architects need to thoroughly understand signal and power integrity issues in order to successfully design packages and boards for high speed systems. Now, for the first time, there's a complete guide to power integrity modeling: everything you need to know, from the basics through the state of the art. Using realistic case studies and downloadable software examples, two leading experts demonstrate today's best techniques for designing and modeling interconnects to efficiently distribute power and minimize noise. The authors carefully introduce the core concepts of power distribution design, systematically present and compare leading techniques for modeling noise, and link these techniques to specific applications. Their many examples range from the simplest (using analytical equations to compute power supply noise) through complex system-level applications. The authors Introduce power delivery network components, analysis, high-frequency measurement, and modeling requirements Thoroughly explain modeling of power/ground planes, including plane behavior, lumped modeling, distributed circuit-based approaches, and much more Offer in-depth coverage of simultaneous switching noise, including modeling for return currents using time- and frequency-domain analysis Introduce several leading time-domain simulation methods, such as macromodeling, and discuss their advantages and disadvantages Present the application of the modeling methods on several advanced case studies that include high-speed servers, high-speed differential signaling, chip package analysis, materials characterization, embedded decoupling capacitors, and electromagnetic bandgap structures This book's system-level focus and practical examples will make it indispensable for every student and professional concerned with power integrity, including electrical engineers, system designers, signal integrity engineers, and materials scientists. It will also be valuable to developers building software that helps to analyze high-speed systems.

Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.Proven methods for noise-tolerant nanoscale integrated circuit design This leading-edge guide discusses the impact of power integrity from a design perspective, emphasizing phenomena and problems induced by power integrity degradation and the latest design trends, including low-power design. Power Integrity for Nanoscale Integrated Systems describes how these problems can be forecast early in the design process and the countermeasures that can be used to address them, such as the inclusion of inductance and accurate modeling for PI analysis, as well as robust circuit design. Detailed examples and a case study on the IBM POWER7+ processor illustrate real-world applications of the techniques presented in this practical resource. Coverage includes: Significance of power integrity for integrated circuits Supply and substrate noise impact on circuits Clock generation and distribution with power integrity Signal and power integrity design for I/O circuits Power integrity degradation and modeling Lumped, distributed, and 3D modeling for power integrity Chip temperature and PI impact Low-power techniques and PI impact Power integrity case study using the IBM POWER7+ processor chip Carbon nanotube interconnects for power delivery

This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

This thoroughly updated leading-edge circuit design resource offers the knowledge needed to quickly pinpoint transmission problems that can compromise the entire circuit design. This new edition demonstrates how to apply EM theory to solve signal integrity problems with a practical application-oriented approach. Discussing both design and debug issues at gigabit per second data rates, the book serves as a practical reference for projects involving high-speed serial signaling on printed wiring boards. Step-by-step, this book goes from reviewing the essentials of linear circuit theory, to examining practical issues of pulse propagation along lossless and lossy transmission lines. It provides detailed guidelines for crosstalk, attenuation, power supply decoupling, and layer stackup tradeoffs (including pad/antipad tradeoffs). Other key topics include the construction of etched conductors, analysis of return paths and split planes, microstrip and stripline characteristics, and SMT capacitors. Filled with on-the-job-proven examples, this hands-on reference is the book that engineers can turn to time and again to design out and troubleshoot circuit signal loss and impedance problems.

In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.

Comprehensive resource on power management ICs affording new levels of functionality and applications with cost reduction in various fields Design of Power Management Integrated Circuits is a comprehensive reference for power management IC design, covering the circuit design of main power management circuits like linear and switched-mode voltage regulators, along with sub-circuits such as power switches, gate drivers and their supply, level shifters, the error amplifier, current sensing, and control loop design. Circuits for protection and diagnostics, as well as aspects of the physical design like lateral and vertical power delivery, pin-out, floor planning, grounding/supply guidelines, and packaging, are also addressed. A full chapter is dedicated to the design of integrated passives. The text illustrates the application of power management integrated circuits (PMIC) to growth areas like computing, the internet of Things, mobility, and renewable energy. Includes numerous real-world examples, case studies, and exercises illustrating key design concepts and techniques. Offering a unique insight into this rapidly evolving technology through the author's experience developing PMICs in both the industrial and academic environment, Design of Power Management Integrated Circuits includes information on: Capacitive, inductive and hybrid DC-DC converters and their essential circuit blocks, covering error amplifiers, comparators, and ramp generators Sensing, protection, and diagnostics, covering thermal protection, inductive loads and clamping structures, under-voltage, reference and power-on reset generation Integrated MOS, MOM and MIM capacitors, integrated inductors Control loop design and PWM generation ensuring stability and fast transient response; subharmonic oscillations in current mode control (analysis and circuit design for slope compensation) DC behavior and DC-related circuit design, covering power efficiency, line and load regulation, error amplifier, dropout, and power transistor sizing Commonly used level shifters (including sizing rules) and cascaded (tapered) driver sizing and optimization guidelines Optimizing the physical design considering packaging, floor planning, EMI, pinout, PCB design and thermal design Design of Power Management Integrated Circuits is an essential resource on the subject for circuit designers/IC designers, system engineers, and application engineers, along with advanced undergraduate students and graduate students in related programs of study.

The First Comprehensive, Example-Rich Guide to Power Integrity Modeling Professionals such as signal integrity engineers, package designers, and system architects need to thoroughly understand signal and power integrity issues in order to successfully design packages and boards for high speed systems. Now, for the first time, there's a complete guide to power integrity modeling: everything you need to know, from the basics through the state of the art. Using realistic case studies and downloadable software examples, two leading experts demonstrate today's best techniques for designing and modeling interconnects to efficiently distribute power and minimize noise. The authors carefully introduce the core concepts of power distribution design, systematically present and compare leading techniques for modeling noise, and link these techniques to specific applications. Their many examples range from the simplest (using analytical equations to compute power supply noise) through complex system-level applications. The authors Introduce power delivery network components, analysis, high-frequency measurement, and modeling requirements Thoroughly explain modeling of power/ground planes, including plane behavior, lumped modeling, distributed circuit-based approaches, and much more Offer in-depth coverage of simultaneous switching noise, including modeling for return currents using time- and frequency-domain analysis Introduce several leading time-domain simulation methods, such as macromodeling, and discuss their advantages and disadvantages Present the application of the modeling methods on several advanced case studies that include high-speed servers, high-speed differential signaling, chip package analysis, materials characterization, embedded decoupling capacitors, and electromagnetic bandgap structures This book's system-level focus and practical examples will make it indispensable for every student and professional concerned with power integrity, including electrical engineers, system designers, signal integrity engineers, and materials scientists. It will also be valuable to developers building software that helps to analyze high-speed systems.

"...offers a tutorial guide to IC designers who want to move to the next level of chip design by unlocking the secrets of signal integrity." —Jake Buurma, Senior Vice President, Worldwide Research & Development, Cadence Design Systems, Inc. Covers signal integrity effects in high performance Radio Frequency (RF) IC Brings together research papers from the past few years that address the broad range of issues faced by IC designers and CAD managers now and in the future A Wiley-IEEE Press publication