This book provides readers with an up-to-date account of the use of machine learning frameworks, methodologies, algorithms and techniques in the context of computer-aided design (CAD) for very-large-scale integrated circuits (VLSI). Coverage includes the various machine learning methods used in lithography, physical design, yield prediction, post-silicon performance analysis, reliability and failure analysis, power and thermal analysis, analog design, logic synthesis, verification, and neuromorphic design. Provides up-to-date information on machine learning in VLSI CAD for device modeling, layout verifications, yield prediction, post-silicon validation, and reliability; Discusses the use of machine learning techniques in the context of analog and digital synthesis; Demonstrates how to formulate VLSI CAD objectives as machine learning problems and provides a comprehensive treatment of their efficient solutions; Discusses the tradeoff between the cost of collecting data and prediction accuracy and provides a methodology for using prior data to reduce cost of data collection in the design, testing and validation of both analog and digital VLSI designs. From the Foreword As the semiconductor industry embraces the rising swell of cognitive systems and edge intelligence, this book could serve as a harbinger and example of the osmosis that will exist between our cognitive structures and methods, on the one hand, and the hardware architectures and technologies that will support them, on the other....As we transition from the computing era to the cognitive one, it behooves us to remember the success story of VLSI CAD and to earnestly seek the help of the invisible hand so that our future cognitive systems are used to design more powerful cognitive systems. This book is very much aligned with this on-going transition from computing to cognition, and it is with deep pleasure that I recommend it to all those who are actively engaged in this exciting transformation. Dr. Ruchir Puri, IBM Fellow, IBM Watson CTO & Chief Architect, IBM T. J. Watson Research Center

This book provides readers with an up-to-date account of the use of machine learning frameworks, methodologies, algorithms and techniques in the context of computer-aided design (CAD) for very-large-scale integrated circuits (VLSI). Coverage includes the various machine learning methods used in lithography, physical design, yield prediction, post-silicon performance analysis, reliability and failure analysis, power and thermal analysis, analog design, logic synthesis, verification, and neuromorphic design. Provides up-to-date information on machine learning in VLSI CAD for device modeling, layout verifications, yield prediction, post-silicon validation, and reliability; Discusses the use of machine learning techniques in the context of analog and digital synthesis; Demonstrates how to formulate VLSI CAD objectives as machine learning problems and provides a comprehensive treatment of their efficient solutions; Discusses the tradeoff between the cost of collecting data and prediction accuracy and provides a methodology for using prior data to reduce cost of data collection in the design, testing and validation of both analog and digital VLSI designs. From the Foreword As the semiconductor industry embraces the rising swell of cognitive systems and edge intelligence, this book could serve as a harbinger and example of the osmosis that will exist between our cognitive structures and methods, on the one hand, and the hardware architectures and technologies that will support them, on the other ... As we transition from the computing era to the cognitive one, it behooves us to remember the success story of VLSI CAD and to earnestly seek the help of the invisible hand so that our future cognitive systems are used to design more powerful cognitive systems. This book is very much aligned with this on-going transition from computing to cognition, and it is with deep pleasure that I recommend it to all those who are actively engaged in this exciting transformation. Dr. Ruchir Puri, IBM Fellow, IBM Watson CTO & Chief Architect, IBM T.J. Watson Research Center.

Consumer electronics have become an integral part of people’s life putting at their disposal immense computational power that provides numerous applications. This has been enabled by the ceaseless down scaling of integrated circuit (IC) technologies which keeps pushing the performance boundary. Such scaling continues to drive, as a byproduct, an up scale in the challenges associated with circuit design and manufacturability. Among the major challenges facing modern IC Computer Aided Design (CAD) are those related to manufacturing and yield which are manifested through: (1) expensive modeling and simulation (e.g. large and complex designs); (2) entangled design and manufacturability (e.g., yield sensitive to design patterns); and (3) strict design constraints (e.g., high yield). While these challenges associated with retaining the robustness of modern designs continue to exacerbate, Very Large-Scale Integration (VLSI) CAD is becoming more critical, yet more challenging. Parallel to these developments are the recent advancements in Machine Learning (ML) which have altered the perception of computing. This dissertation attempts to address the aforementioned challenges in VLSI CAD through machine learning techniques. Our research includes efficient analog modeling, learning-assisted physical design and yield analysis, and model adaptation schemes tailored to the ever-changing IC environment. With aggressive scaling, process variation manifests itself among the most prominent factors limiting the yield of analog and mixed-signal (AMS) circuits. In modern ICs, the expensive simulation cost is one of the challenges facing accurate modeling of this variation. Our study develops a novel semi-supervised learning framework for AMS design modeling that is capable of significantly reducing the modeling cost. In addition, a new perspective towards incorporating sparsity in the modeling task is proposed. At the lithography stage, resolution enhancement techniques in general, and Sub Resolution Assist Feature (SRAF) insertion in particular, have become indispensable given the ever shrinking feature size. While different approaches have been proposed for SRAF insertion, the trade-off between efficiency and accuracy is still the governing principle. To address this, we recast the SRAF insertion process as an image translation task and propose a deep learning-based approach for efficient SRAF insertion. Besides, with complex designs, challenges at the physical design stage have exacerbated. Therefore, across-layers information sharing has become imperative for timely design closure. Particularly, in modern Field Programmable Gate Array (FPGA) place and route flows, leveraging routing congestion information during placement has demonstrated imperative benefit. Our study develops a new congestion prediction approach for large-scale FPGA designs that achieves superior prediction accuracy. Moreover, during fabrication, a critical first step towards improving production yield is to identify the underlying factors that contribute most to yield loss. And for that, wafer map defect analysis is a key. We present a novel wafer map defect pattern classification framework using confidence-aware deep selective learning. The use of ML for CAD tasks has the promise of delivering better performance and efficiency. However, one of the main characteristics of the field is that it is evolving with a fast rate of change. Therefore, by the time enough data is available to train accurate models under a given environment, changes start to occur. In this sense, the frequent restarts limit the returns on developing ML models. To address this, we develop a framework for the fast migration of classification models across different environments. Our approaches are validated with extensive experiments where they proved capable of advancing the VLSI CAD flow

Machine learning is a potential solution to resolve bottleneck issues in VLSI via optimizing tasks in the design process. This book aims to provide the latest machine-learning–based methods, algorithms, architectures, and frameworks designed for VLSI design. The focus is on digital, analog, and mixed-signal design techniques, device modeling, physical design, hardware implementation, testability, reconfigurable design, synthesis and verification, and related areas. Chapters include case studies as well as novel research ideas in the given field. Overall, the book provides practical implementations of VLSI design, IC design, and hardware realization using machine learning techniques. Features: Provides the details of state-of-the-art machine learning methods used in VLSI design Discusses hardware implementation and device modeling pertaining to machine learning algorithms Explores machine learning for various VLSI architectures and reconfigurable computing Illustrates the latest techniques for device size and feature optimization Highlights the latest case studies and reviews of the methods used for hardware implementation This book is aimed at researchers, professionals, and graduate students in VLSI, machine learning, electrical and electronic engineering, computer engineering, and hardware systems.

​This book serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification. Experts from academia and industry cover a wide range of the latest research on ML applications in electronic design automation (EDA), including analysis and optimization of digital design, analysis and optimization of analog design, as well as functional verification, FPGA and system level designs, design for manufacturing (DFM), and design space exploration. The authors also cover key ML methods such as classical ML, deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO). All of these topics are valuable to chip designers and EDA developers and researchers working in digital and analog designs and verification.

The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings. “This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics.” Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group “This is the book I wish I had when I taught EDA in the past, and the one I’m using from now on.” Dr. Louis K. Scheffer, Howard Hughes Medical Institute “I would happily use this book when teaching Physical Design. I know of no other work that’s as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!” Prof. John P. Hayes, University of Michigan “The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.” Prof. Kurt Keutzer, University of California, Berkeley “An excellent balance of the basics and more advanced concepts, presented by top experts in the field.” Prof. Sachin Sapatnekar, University of Minnesota

This book gathers selected high-quality research papers presented at International Conference on Mobile Computing and Sustainable Informatics (ICMCSI 2021) organized by Pulchowk Campus, Institute of Engineering, Tribhuvan University, Nepal, during 29–30 January 2021. The book discusses recent developments in mobile communication technologies ranging from mobile edge computing devices, to personalized, embedded and sustainable applications. The book covers vital topics like mobile networks, computing models, algorithms, sustainable models and advanced informatics that supports the symbiosis of mobile computing and sustainable informatics.

This book is an edited selection of the papers presented at the International Workshop on VLSI for Artifidal Intelligence and Neural Networks which was held at the University of Oxford in September 1990. Our thanks go to all the contributors and especially to the programme committee for all their hard work. Thanks are also due to the ACM-SIGARCH, the IEEE Computer Society, and the lEE for publicizing the event and to the University of Oxford and SUNY-Binghamton for their active support. We are particularly grateful to Anna Morris, Maureen Doherty and Laura Duffy for coping with the administrative problems. Jose Delgado-Frias Will Moore April 1991 vii PROLOGUE Artificial intelligence and neural network algorithms/computing have increased in complexity as well as in the number of applications. This in tum has posed a tremendous need for a larger computational power than can be provided by conventional scalar processors which are oriented towards numeric and data manipulations. Due to the artificial intelligence requirements (symbolic manipulation, knowledge representation, non-deterministic computations and dynamic resource allocation) and neural network computing approach (non-programming and learning), a different set of constraints and demands are imposed on the computer architectures for these applications.

CAD (Computer Aided Design) technology is now crucial for every division of modern industry, from a viewpoint of higher productivity and better products. As technologies advance, the amount of information and knowledge that engineers have to deal with is constantly increasing. This results in seeking more advanced computer technology to achieve higher functionalities, flexibility, and efficient performance of the CAD systems. Knowledge engineering, or more broadly artificial intelligence, is considered a primary candidate technology to build a new generation of CAD systems. Since design is a very intellectual human activity, this approach seems to make sense. The ideas of intelligent CAD systems (ICAD) are now increasingly discussed everywhere. We can observe many conferences and workshops reporting a number of research efforts on this particular subject. Researchers are coming from computer science, artificial intelligence, mechanical engineering, electronic engineering, civil engineering, architectural science, control engineering, etc. But, still we cannot see the direction of this concept, or at least, there is no widely accepted concept of ICAD. What can designers expect from these future generation CAD systems? In which direction must developers proceed? The situation is somewhat confusing.

Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors.