This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection.

This book facilitates the VLSI-interested individuals with not only in-depth knowledge, but also the broad aspects of it by explaining its applications in different fields, including image processing and biomedical. The deep understanding of basic concepts gives you the power to develop a new application aspect, which is very well taken care of in this book by using simple language in explaining the concepts. In the VLSI world, the importance of hardware description languages cannot be ignored, as the designing of such dense and complex circuits is not possible without them. Both Verilog and VHDL languages are used here for designing. The current needs of high-performance integrated circuits (ICs) including low power devices and new emerging materials, which can play a very important role in achieving new functionalities, are the most interesting part of the book. The testing of VLSI circuits becomes more crucial than the designing of the circuits in this nanometer technology era. The role of fault simulation algorithms is very well explained, and its implementation using Verilog is the key aspect of this book. This book is well organized into 20 chapters. Chapter 1 emphasizes on uses of FPGA on various image processing and biomedical applications. Then, the descriptions enlighten the basic understanding of digital design from the perspective of HDL in Chapters 2–5. The performance enhancement with alternate material or geometry for silicon-based FET designs is focused in Chapters 6 and 7. Chapters 8 and 9 describe the study of bimolecular interactions with biosensing FETs. Chapters 10–13 deal with advanced FET structures available in various shapes, materials such as nanowire, HFET, and their comparison in terms of device performance metrics calculation. Chapters 14–18 describe different application-specific VLSI design techniques and challenges for analog and digital circuit designs. Chapter 19 explains the VLSI testability issues with the description of simulation and its categorization into logic and fault simulation for test pattern generation using Verilog HDL. Chapter 20 deals with a secured VLSI design with hardware obfuscation by hiding the IC’s structure and function, which makes it much more difficult to reverse engineer.

Advances in Computers, Volume 108, the latest volume in a series published since 1960, presents detailed coverage of innovations in computer hardware, software, theory, design and applications. This book provides contributors with a medium in which they can explore subjects in greater depth and breadth than similar topics in journal articles allow. - Provides in-depth surveys and tutorials on new computer technology - Covers well-known authors and researchers in the field - Presents extensive bibliographies with most chapters - Includes volumes that are devoted to single themes or subfields of computer science

This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the “trenches” of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.

This overview of the security problems in modern VLSI design provides a detailed treatment of a newly developed constraint-based protection paradigm for the protection of VLSI design IPs – from FPGA design to standard-cell placement, and from advanced CAD tools to physical design algorithms.

This book is a comprehensive collection of chapters focusing on the core areas of computing and their further applications in the real world. Each chapter is a paper presented at the Computing Conference 2021 held on 15-16 July 2021. Computing 2021 attracted a total of 638 submissions which underwent a double-blind peer review process. Of those 638 submissions, 235 submissions have been selected to be included in this book. The goal of this conference is to give a platform to researchers with fundamental contributions and to be a premier venue for academic and industry practitioners to share new ideas and development experiences. We hope that readers find this volume interesting and valuable as it provides the state-of-the-art intelligent methods and techniques for solving real-world problems. We also expect that the conference and its publications is a trigger for further related research and technology improvements in this important subject.

This book proposes a synergistic framework to help IP vendors to protect hardware IP privacy and integrity from design, optimization, and evaluation perspectives. The proposed framework consists of five interacting components that directly target at the primary IP violations. All the five algorithms are developed based on rigorous mathematical modeling for primary IP violations and focus on different stages of IC design, which can be combined to provide a formal security guarantee.

This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade. Coverage includes issues related to security and trust in a variety of electronic devices and systems related to the security of hardware, firmware and software, spanning system applications, online transactions and networking services. This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of and trust in, modern society’s microelectronic-supported infrastructures.

This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade. Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems. This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of, and trust in, modern society’s microelectronic-supported infrastructures.