This book provides a single-source reference on carbon nanotubes for interconnect applications. It presents the recent advances in modelling and challenges of carbon nanotube (CNT)-based VLSI interconnects. Starting with a background of carbon nanotubes and interconnects, this book details various aspects of CNT interconnect models, the design metrics of CNT interconnects, crosstalk analysis of recently proposed CNT interconnect structures, and geometries. Various topics covered include the use of semiconducting CNTs around metallic CNTs, CNT interconnects with air gaps, use of emerging ultra low-k materials and their integration with CNT interconnects, and geometry-based crosstalk reduction techniques. This book will be useful for researchers and design engineers working on carbon nanotubes for interconnects for both 2D and 3D integrated circuits.

An Alternative to Copper-Based Interconnect Technology With an increase in demand for more circuit components on a single chip, there is a growing need for nanoelectronic devices and their interconnects (a physical connecting medium made of thin metal films between several electrical nodes in a semiconducting chip that transmit signals from one point to another without any distortion). Carbon Nanotube and Graphene Nanoribbon Interconnects explores two new important carbon nanomaterials, carbon nanotube (CNT) and graphene nanoribbon (GNR), and compares them with that of copper-based interconnects. These nanomaterials show almost 1,000 times more current-carrying capacity and significantly higher mean free path than copper. Due to their remarkable properties, CNT and GNR could soon replace traditional copper interconnects. Dedicated to proving their benefits, this book covers the basic theory of CNT and GNR, and provides a comprehensive analysis of the CNT- and GNR-based VLSI interconnects at nanometric dimensions. Explore the Potential Applications of CNT and Graphene for VLSI Circuits The book starts off with a brief introduction of carbon nanomaterials, discusses the latest research, and details the modeling and analysis of CNT and GNR interconnects. It also describes the electrical, thermal, and mechanical properties, and structural behavior of these materials. In addition, it chronicles the progression of these fundamental properties, explores possible engineering applications and growth technologies, and considers applications for CNT and GNR apart from their use in VLSI circuits. Comprising eight chapters this text: Covers the basics of carbon nanotube and graphene nanoribbon Discusses the growth and characterization of carbon nanotube and graphene nanoribbon Presents the modeling of CNT and GNR as future VLSI interconnects Examines the applicability of CNT and GNR in terms of several analysis works Addresses the timing and frequency response of the CNT and GNR interconnects Explores the signal integrity analysis for CNT and GNR interconnects Models and analyzes the applicability of CNT and GNR as power interconnects Considers the future scope of CNT and GNR Beneficial to VLSI designers working in this area, Carbon Nanotube and Graphene Nanoribbon Interconnects provides a complete understanding of carbon-based materials and interconnect technology, and equips the reader with sufficient knowledge about the future scope of research and development for this emerging topic.

This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology.

Aggressive scaling of device and interconnect dimensions has resulted in many low dimensional issues in the nanometer regime. This book deals with various new generation interconnect materials and interconnect modeling and highlights the significance of novel nano interconnect materials for 3D integrated circuit design. It provides information about advanced nanomaterials like carbon nanotube (CNT) and graphene nanoribbon (GNR) for the realization of interconnects, interconnect models, and crosstalk noise analysis. Features: Focusses on materials and nanomaterials utilization in next generation interconnects based on Carbon nanotubes (CNT) and Graphene nanoribbons (GNR). Helps readers realize interconnects, interconnect models, and crosstalk noise analysis. Describes Hybrid CNT and GNR based interconnects. Presents the details of power supply voltage drop analysis in CNT and GNR interconnects. Overviews pertinent RF performance and stability analysis. This book is aimed at graduate students and researchers in electrical and materials engineering, nano/microelectronics.

Recent advances in semiconductor technology offer vertical interconnect access (via) that extend through silicon, popularly known as through silicon via (TSV). This book provides a comprehensive review of the theory behind TSVs while covering most recent advancements in materials, models and designs. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for Cu, carbon nanotube (CNT) and graphene nanoribbon (GNR) based TSVs are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR based TSVs are also discussed.

The brief primarily focuses on the performance analysis of CNT based interconnects in current research scenario. Different CNT structures are modeled on the basis of transmission line theory. Performance comparison for different CNT structures illustrates that CNTs are more promising than Cu or other materials used in global VLSI interconnects. The brief is organized into five chapters which mainly discuss: (1) an overview of current research scenario and basics of interconnects; (2) unique crystal structures and the basics of physical properties of CNTs, and the production, purification and applications of CNTs; (3) a brief technical review, the geometry and equivalent RLC parameters for different single and bundled CNT structures; (4) a comparative analysis of crosstalk and delay for different single and bundled CNT structures; and (5) various unique mixed CNT bundle structures and their equivalent electrical models.

This contributed book provides a thorough understanding of the basics along with detailed state-of-the-art emerging interconnect technologies for integrated circuit design and flexible electronics. It focuses on the investigation of advanced on-chip interconnects which match the current as well as future technology requirements. The contents focus on different aspects of interconnects such as material, physical characteristics, parasitic extraction, design, structure, modeling, machine learning, and neural network-based models for interconnects, signaling schemes, varying signal integrity performance analysis, variability, reliability aspects, associated electronic design automation tools. The book also explores interconnect technologies for flexible electronic systems. It also highlights the integration of sensors with stretchable interconnects to demonstrate the concept of a stretchable sensing network for wearable and flexible applications. This book is a useful guide for those working in academia and industry to understand the fundamentals and application of interconnect technologies.

The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the MLGNR while taking into account the edge roughness.

Carbon nanotubes (CNTs), discovered in 1991, have been a subject of intensive research for a wide range of applications. These one-dimensional (1D) graphene sheets rolled into a tubular form have been the target of many researchers around the world. This book concentrates on the semiconductor physics of carbon nanotubes, it brings unique insight into the phenomena encountered in the electronic structure when operating with carbon nanotubes. This book also presents to reader useful information on the fabrication and applications of these outstanding materials. The main objective of this book is to give in-depth understanding of the physics and electronic structure of carbon nanotubes. Readers of this book should have a strong background on physical electronics and semiconductor device physics. This book first discusses fabrication techniques followed by an analysis on the physical properties of carbon nanotubes, including density of states and electronic structures. Ultimately, the book pursues a significant amount of work in the industry applications of carbon nanotubes.

This textbook comprehensively covers on-chip interconnect dimension and application of carbon nanomaterials for modeling VLSI interconnect and buffer circuits. It provides analysis of ultra-low power high speed nano-interconnects based on different facets such as material modeling, circuit modeling and the adoption of repeater insertion strategies and measurement techniques. It covers important topics including on-chip interconnects, interconnect modeling, electrical impedance modeling of on-chip interconnects, modeling of repeater buffer and variability analysis. Pedagogical features including solved problems and unsolved exercises are interspersed throughout the text for better understanding. Aimed at senior undergraduate and graduate students in the field of electrical engineering, electronics and communications engineering for courses on Advanced VLSI Interconnects/Advanced VLSI Design/VLSI Interconnects/VLSI Design Automation and Techniques, this book: Provides comprehensive coverage of fundamental concepts related to nanotube transistors and interconnects. Discusses properties and performance of practical nanotube devices and related applications. Covers physical and electrical phenomena of carbon nanotubes, as well as applications enabled by this nanotechnology. Discusses the structure, properties, and characteristics of graphene-based on-chip interconnect. Examines interconnect power and interconnect delay issues arising due to downscaling of device size.