This book covers the complete spectrum of the fundamentals of clocked, regenerative comparators, their state-of-the-art, advanced CMOS technologies, innovative comparators inclusive circuit aspects, their characterization and properties. Starting from the basics of comparators and the transistor characteristics in nanometer CMOS, seven high-performance comparators developed by the authors in 120nm and 65nm CMOS are described extensively. Methods and measurement circuits for the characterization of advanced comparators are introduced. A synthesis of the largely differing aspects of demands on modern comparators and the properties of devices being available in nanometer CMOS, which are posed by the so-called nanometer hell of physics, is accomplished. The book summarizes the state of the art in integrated comparators. Advanced measurement circuits for characterization will be introduced as well as the method of characterization by bit-error analysis usually being used for characterization of optical receivers. The book is compact, and the graphical quality of the illustrations is outstanding. This book is written for engineers and researchers in industry as well as scientists and Ph.D students at universities. It is also recommendable to graduate students specializing on nanoelectronics and microelectronics or circuit design.

The book presents design methods for analog integrated circuits with improved electrical performance. It describes different equivalent transistor models, design methods, and fabrication considerations for high-density integrated circuits in nanometer CMOS processes, and it analyzes circuit architectures that are suitable for analog building blocks. Highlighting various design challenges, the text offers a complete understanding of architectural- and transistor-level design issues of analog integrated circuits. It examines important trends in the design of high-speed and power-efficient front-end analog circuits that can be used for signal conditioning, filtering, and detection applications. Offers a comprehensive resource for mastering the analysis of analog integrated circuits. Describes circuit-level details of high-speed and power-efficient analog building blocks. Explores design methods based on various MOS transistor models (MOSFET, FinFET). Provides mathematical derivations of all equations and formulas. Emphasizes practical aspects relevant to integrated circuit implementation. Includes open-ended circuit design case studies.

This book presents theory, design methods and novel applications for integrated circuits for analog signal processing. The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode. This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc. Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc. Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements with low voltage and low power constraints; Offers guidelines for selecting the right active devices/elements in the design of linear and nonlinear circuits; Discusses optimization of the active devices/elements for process and manufacturing issues of nanometer technology.

This book focuses on modeling, simulation and analysis of analog circuit aging. First, all important nanometer CMOS physical effects resulting in circuit unreliability are reviewed. Then, transistor aging compact models for circuit simulation are discussed and several methods for efficient circuit reliability simulation are explained and compared. Ultimately, the impact of transistor aging on analog circuits is studied. Aging-resilient and aging-immune circuits are identified and the impact of technology scaling is discussed. The models and simulation techniques described in the book are intended as an aid for device engineers, circuit designers and the EDA community to understand and to mitigate the impact of aging effects on nanometer CMOS ICs.

This book comprises selected articles from the International Communications Conference (ICC) 2018 held in Hyderabad, India in 2018. It offers in-depth information on the latest developments in voice-, data-, image- and multimedia processing research and applications, and includes contributions from both academia and industry.

This book comprises select peer-reviewed papers from the International Conference on VLSI, Communication and Signal processing (VCAS) 2019, held at Motilal Nehru National Institute of Technology (MNNIT) Allahabad, Prayagraj, India. The contents focus on latest research in different domains of electronics and communication engineering, in particular microelectronics and VLSI design, communication systems and networks, and signal and image processing. The book also discusses the emerging applications of novel tools and techniques in image, video and multimedia signal processing. This book will be useful to students, researchers and professionals working in the electronics and communication domain.

Low-Power High-Speed ADCs for Nanometer CMOS Integration is about the design and implementation of ADC in nanometer CMOS processes that achieve lower power consumption for a given speed and resolution than previous designs, through architectural and circuit innovations that take advantage of unique features of nanometer CMOS processes. A phase lock loop (PLL) clock multiplier has also been designed using new circuit techniques and successfully tested. 1) A 1.2V, 52mW, 210MS/s 10-bit two-step ADC in 130nm CMOS occupying 0.38mm2. Using offset canceling comparators and capacitor networks implemented with small value interconnect capacitors to replace resistor ladder/multiplexer in conventional sub-ranging ADCs, it achieves 74dB SFDR for 10MHz and 71dB SFDR for 100MHz input. 2) A 32mW, 1.25GS/s 6-bit ADC with 2.5GHz internal clock in 130nm CMOS. A new type of architecture that combines flash and SAR enables the lowest power consumption, 6-bit >1GS/s ADC reported to date. This design can be a drop-in replacement for existing flash ADCs since it does require any post-processing or calibration step and has the same latency as flash. 3) A 0.4ps-rms-jitter (integrated from 3kHz to 300MHz offset for >2.5GHz) 1-3GHz tunable, phase-noise programmable clock-multiplier PLL for generating sampling clock to the SAR ADC. A new loop filter structure enables phase error preamplification to lower PLL in-band noise without increasing loop filter capacitor size.

The book focuses on the integration of intelligent communication systems, control systems, and devices related to all aspects of engineering and sciences. It contains high-quality research papers presented at the 2nd international conference, ICICCD 2017, organized by the Department of Electronics, Instrumentation and Control Engineering of University of Petroleum and Energy Studies, Dehradun on 15 and 16 April, 2017. The volume broadly covers recent advances of intelligent communication, intelligent control and intelligent devices. The work presented in this book is original research work, findings and practical development experiences of researchers, academicians, scientists and industrial practitioners.

Analog Circuit Design contains the contribution of 18 tutorials of the 19th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Robust Design, chaired by Herman Casier, Consultant Sigma Delta Converters, chaired by Prof. Michiel Steyaert, Catholic University Leuven RFID, chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible. The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O. Contents: Achieving Analog Accuracy in Nanometer CMOS (M P Flynn et al.); Self-Induced Noise in Integrated Circuits (R Gharpurey & S Naraghi); High-Speed Oversampling Analog-to-Digital Converters (A Gharbiya et al.); Designing LC VCOs Using Capacitive Degeneration Techniques (B Jung & R Harjani); Fully Integrated Frequency Synthesizers: A Tutorial (S T Moon et al.); Recent Advances and Design Trends in CMOS Radio Frequency Integrated Circuits (D J Allstot et al.); Equalizers for High-Speed Serial Links (P K Hanumolu et al.); Low-Power, Parallel Interface with Continuous-Time Adaptive Passive Equalizer and Crosstalk Cancellation (C P Yue et al.). Readership: Technologists, scientists, and engineers in the field of high-speed communication circuits. It can also be used as a textbook for graduate and advanced undergraduate courses.