With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-purpose processors, network-on-chip (NoC) and deep learning accelerators, and present prototypes to demonstrate how 3S responds to in-field silicon degradation and recovery under various runtime faults caused by aging, process variations, or radical particles. Moreover, we demonstrate that 3S not only offers a powerful backbone for various on-chip fault-tolerant designs and implementations, but also has farther-reaching implications such as maintaining graceful performance degradation, mitigating the impact of verification blind spots, and improving chip yield. This book is the outcome of extensive fault-tolerant computing research pursued at the State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences over the past decade. The proposed built-in on-chip fault-tolerant computing paradigm has been verified in a broad range of scenarios, from small processors in satellite computers to large processors in HPCs. Hopefully, it will provide an alternative yet effective solution to the growing reliability challenges for large-scale VLSI designs.

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

Cities and Their Vital Systems asks basic questions about the longevity, utility, and nature of urban infrastructures; analyzes how they grow, interact, and change; and asks how, when, and at what cost they should be replaced. Among the topics discussed are problems arising from increasing air travel and airport congestion; the adequacy of water supplies and waste treatment; the impact of new technologies on construction; urban real estate values; and the field of "telematics," the combination of computers and telecommunications that makes money machines and national newspapers possible.

This book presents the theory behind software-implemented hardware fault tolerance, as well as the practical aspects needed to put it to work on real examples. By evaluating accurately the advantages and disadvantages of the already available approaches, the book provides a guide to developers willing to adopt software-implemented hardware fault tolerance in their applications. Moreover, the book identifies open issues for researchers willing to improve the already available techniques.

As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network. The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation.

Fault-Tolerant Systems is the first book on fault tolerance design with a systems approach to both hardware and software. No other text on the market takes this approach, nor offers the comprehensive and up-to-date treatment that Koren and Krishna provide. This book incorporates case studies that highlight six different computer systems with fault-tolerance techniques implemented in their design. A complete ancillary package is available to lecturers, including online solutions manual for instructors and PowerPoint slides. Students, designers, and architects of high performance processors will value this comprehensive overview of the field. - The first book on fault tolerance design with a systems approach - Comprehensive coverage of both hardware and software fault tolerance, as well as information and time redundancy - Incorporated case studies highlight six different computer systems with fault-tolerance techniques implemented in their design - Available to lecturers is a complete ancillary package including online solutions manual for instructors and PowerPoint slides

This textbook serves as an introduction to fault-tolerance, intended for upper-division undergraduate students, graduate-level students and practicing engineers in need of an overview of the field. Readers will develop skills in modeling and evaluating fault-tolerant architectures in terms of reliability, availability and safety. They will gain a thorough understanding of fault tolerant computers, including both the theory of how to design and evaluate them and the practical knowledge of achieving fault-tolerance in electronic, communication and software systems. Coverage includes fault-tolerance techniques through hardware, software, information and time redundancy. The content is designed to be highly accessible, including numerous examples and exercises. Solutions and powerpoint slides are available for instructors.

Great POSSIBILITIES and high future prospects to become ten times folds in the near FUTUREKey features Comprehensively gives clear picture of current state-of-the-art aspect of cloud computing by elaborating terminologies, models and other related terms. Enlightens all major players in Cloud Computing industry providing services in terms of SaaS, PaaS and IaaS. Highlights Cloud Computing Simulators, Security Aspect and Resource Allocation. In-depth presentation with well-illustrated diagrams and simple to understand technical concepts of cloud. Description The book "e;Handbook of Cloud Computing"e; provides the latest and in-depth information of this relatively new and another platform for scientific computing which has great possibilities and high future prospects to become ten folds in near future. The book covers in comprehensive manner all aspects and terminologies associated with cloud computing like SaaS, PaaS and IaaS and also elaborates almost every cloud computing service model.The book highlights several other aspects of cloud computing like Security, Resource allocation, Simulation Platforms and futuristic trend i.e. Mobile cloud computing. The book will benefit all the readers with all in-depth technical information which is required to understand current and futuristic concepts of cloud computing. No prior knowledge of cloud computing or any of its related technology is required in reading this book. What will you learn Cloud Computing, Virtualisation Software as a Service, Platform as a Service, Infrastructure as a Service Data in Cloud and its Security Cloud Computing - Simulation, Mobile Cloud Computing Specific Cloud Service Models Resource Allocation in Cloud Computing Who this book is for Students of Polytechnic Diploma Classes- Computer Science/ Information Technology Graduate Students- Computer Science/ CSE / IT/ Computer Applications Master Class Students-Msc (CS/IT)/ MCA/ M.Phil, M.Tech, M.S. Researcher's-Ph.D Research Scholars doing work in Virtualization, Cloud Computing and Cloud Security Industry Professionals- Preparing for Certifications, Implementing Cloud Computing and even working on Cloud Security Table of contents1. Introduction to Cloud Computing2. Virtualisation3. Software as a Service4. Platform as a Service5. Infrastructure as a Service6. Data in Cloud7. Cloud Security 8. Cloud Computing - Simulation9. Specific Cloud Service Models10. Resource Allocation in Cloud Computing11. Mobile Cloud Computing About the authorDr. Anand Nayyar received Ph.D (Computer Science) in Wireless Sensor Networks and Swarm Intelligence. Presently he is working in Graduate School, Duy Tan University, Da Nang, Vietnam. He has total of fourteen Years of Teaching, Research and Consultancy experience with more than 250 Research Papers in various International Conferences and highly reputed journals. He is certified Professional with more than 75 certificates and member of 50 Professional Organizations. He is acting as "e;ACM DISTINGUISHED SPEAKER"e;

Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semiconductor test costs have been growing steadily and typically amount to 40% of today's overall product cost. This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and VLSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. - Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples. - Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing, Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package (SIP) Testing, which are not yet available in any testing book. - Covers the entire spectrum of VLSI testing and DFT architectures, from digital and analog, to memory circuits, and fault diagnosis and self-repair from digital to memory circuits. - Discusses future nanotechnology test trends and challenges facing the nanometer design era; promising nanotechnology test techniques, including Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid Semiconductor/Nanowire/Molecular Computing. - Practical problems at the end of each chapter for students.