This volume presents the latest research worldwide on communications protocols, emphasizing specification and compliance testing. It presents the complete proceedings of the fifteenth meeting on `Protocol Specification, Testing and Verification' arranged by the International Federation for Information Processing.

For more than a decade, researchers and engineers have been addressing the problem of the application of formal description techniques to protocol specification, implementation, testing and verification. This book identifies the many successes that have been achieved within the industrial framework and the difficulties encountered in applying theoretical methods to practical situations. Issues discussed include: testing and certification; verification; validation; environments and automated tools; formal specifications; protocol conversion; implementation; specification languages and models. Consideration is also given to the concerns surrounding education available to students and the need to upgrade and develop this through sponsorship of a study of an appropriate curriculum at both undergraduate and graduate levels. It is hoped this publication will stimulate such support and inspire further research in this important arena.

FORTE/PSTV '97 addresses Formal Description Techniques (FDTs) applicable to Distributed Systems and Communication Protocols (such as Estelle, LOTOS, SDL, ASN.1, TTCN, Z, Automata, Process Algebra, Logic). The conference is a forum for presentation of the state-of-the-art in theory, application, tools and industrialization of FDTs, and provides an excellent orientation for newcomers.

This volume contains the proceedings of the International Conference on Computer Aided Veri?cation (CAV), held in Edinburgh, Scotland, July 6–10, 2005. CAV 2005 was the seventeenth in a series of conferences dedicated to the advancement of the theory and practice of computer-assisted formal an- ysis methods for software and hardware systems. The conference covered the spectrum from theoretical results to concrete applications, with an emphasis on practical veri?cation tools and the algorithms and techniques that are needed for their implementation. We received 123 submissions for regular papers and 32 submissions for tool papers.Ofthesesubmissions,theProgramCommitteeselected32regularpapers and 16 tool papers, which formed the technical program of the conference. The conference had three invited talks, by Bob Bentley (Intel), Bud Mishra (NYU), and George C. Necula (UC Berkeley). The conference was preceded by a tutorial day, with two tutorials: – Automated Abstraction Re?nement, by Thomas Ball (Microsoft) and Ken McMillan (Cadence); and – Theory and Practice of Decision Procedures for Combinations of (First- Order) Theories, by Clark Barrett (NYU) and Cesare Tinelli (U Iowa). CAV 2005 had six a?liated workshops: – BMC 2005: 3rd Int. Workshop on Bounded Model Checking; – FATES 2005: 5th Workshop on Formal Approaches to Testing Software; – GDV 2005: 2nd Workshop on Games in Design and Veri?cation; – PDPAR 2005: 3rd Workshop on Pragmatics of Decision Procedures in - tomated Reasoning; – RV 2005: 5th Workshop on Runtime Veri?cation; and – SoftMC 2005: 3rd Workshop on Software Model Checking.

Formal Description Techniques and Protocol Specification, Testing and Verification addresses formal description techniques (FDTs) applicable to distributed systems and communication protocols. It aims to present the state of the art in theory, application, tools and industrialization of FDTs. Among the important features presented are: FDT-based system and protocol engineering; FDT-application to distributed systems; Protocol engineering; Practical experience and case studies. Formal Description Techniques and Protocol Specification, Testing and Verification comprises the proceedings of the Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols and Protocol Specification, Testing and Verification, sponsored by the International Federation for Information Processing, held in November 1998, Paris, France. Formal Description Techniques and Protocol Specification, Testing and Verification is suitable as a secondary text for a graduate-level course on Distributed Systems or Communications, and as a reference for researchers and practitioners in industry.

This PSTV'94 Symposium is the fourteenth of a series of annual meetings organized under the auspices of IFIP W.G. 6.1, a Working Group dedicated to "Architectures and Protocols for Computer Networks". This is the oldest and most established symposium in the emerging field of protocol engineering which has spawn many international conferences including FORTE (International Conference on Formal Description Tech niques), IWPTS (International Workshop on Protocol Test Systems), ICNP (Interna tional Conference on Network Protocols) and CAY (Conference on Computer-Aided Verification). The main objective of this PSTV symposium is to provide a forum for researchers and practitioners in industry and academia interested in advances in using formal methods and methodologies to specify, develop, test and verify communication protocols and distributed systems. This year's PSTV symposium enjoys a nice mixture of formal methods and practical issues in network protocols through the invited addresses of three outstanding speakers, Ed Brinksma (University of Twente), Raj Jain (Ohio State University) and David Tennenhouse (MIT) as well as 5 tutorials, in addition to 9 techni cal sessions and two practical panel sessions. The 5 tutorials are offered on the first day in two parallel tracks for intensive exposure on hot topics of current interest. This year, out of 51 submissions the Program Committee selected 18 regular papers (with an allotment of 16 pages in the Proceedings) and 9 mini-papers (of 8 pages).

This book constitutes the strictly refereed post-workshop proceedings of the International Workshop on Requirements Targeting Software and Systems Engineering, RTSE '97, held in Bernried, Germany in October 1997. The 15 revised full papers presented in the book were carefully revised and reviewed for inclusion in the book. Among the authors are internationally leading researchers. The book is divided in sections on foundations of software engineering, methodology, evaluation and case studies, and tool support and prototyping.

The first book to harness the power of .NET for system design, System Level Design with .NET Technology constitutes a software-based approach to design modeling verification and simulation. World class developers, who have been at the forefront of system design for decades, explain how to tap into the power of this dynamic programming environment for more effective and efficient management of metadata—and introspection and interoperability between tools. Using readily available technology, the text details how to capture constraints and requirements at high levels and describes how to percolate them during the refinement process. Departing from proprietary environments built around System Verilog and VHDL, this cutting-edge reference includes an open source environment (ESys.NET) that readers can use to experiment with new ideas, algorithms, and design methods; and to expand the capabilities of their current tools. It also covers: Modeling and simulation—including requirements specification, IP reuse, and applications of design patterns to hardware/software systems Simulation and validation—including transaction-based models, accurate simulation at cycle and transaction levels, cosimulation and acceleration technique, as well as timing specification and validation Practical use of the ESys.NET environment Worked examples, end of chapter references, and the ESys.NET implementation test bed make this the ideal resource for system engineers and students looking to maximize their embedded system designs.

Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research traditions in mathematical logic, programming languages, hardware design, and theoretical computer science, model checking is now widely used for the verification of hardware and software in industry. The editors and authors of this handbook are among the world's leading researchers in this domain, and the 32 contributed chapters present a thorough view of the origin, theory, and application of model checking. In particular, the editors classify the advances in this domain and the chapters of the handbook in terms of two recurrent themes that have driven much of the research agenda: the algorithmic challenge, that is, designing model-checking algorithms that scale to real-life problems; and the modeling challenge, that is, extending the formalism beyond Kripke structures and temporal logic. The book will be valuable for researchers and graduate students engaged with the development of formal methods and verification tools.