System-on-a-chip (SoC) designs result in a wide range of high-complexity, high-value semiconductor products. As the technology scales towards smaller feature sizes and chips grow larger, a speed limitation arises due to an in creased RC delay associated with interconnection wires. Innovative circuit techniques are required to achieve the speed needed for high-performance signal processing. Current sensing is considered as a promising circuit class since it is inherently faster than conventional voltage sense amplifiers. How ever, especially in SRAM, current sensing has rarely been used so far. Practi cal implementations are challenging because they require sophisticated analog circuit techniques in a digital environment. The objective of this book is to provide a systematic and comprehen sive insight into current sensing techniques. Both theoretical and practical aspects are covered. Design guidelines are derived by systematic analysis of different circuit principles. Innovative concepts like compensation of the bit line multiplexer and auto-power-down will be explained based on theory and experimental results. The material will be interesting for design engineers in industry as well as researchers who want to learn about and apply current sensing techniques. The focus is on embedded SRAM but the material presented can be adapted to single-chip SRAM and to any other current-providing memory type as well. This includes emerging memory technologies like magnetic RAM (MRAM) and Ovonic Unified Memory (OUM). Moreover, it is also applicable to array like structures such as CMOS camera chips and to circuits for signal trans mission along highly capacitive busses.

This book constitutes the refereed proceedings of the 17th International Symposium on VLSI Design and Test, VDAT 2013, held in Jaipur, India, in July 2013. The 44 papers presented were carefully reviewed and selected from 162 submissions. The papers discuss the frontiers of design and test of VLSI components, circuits and systems. They are organized in topical sections on VLSI design, testing and verification, embedded systems, emerging technology.

This book presents the latest trends and approaches in artificial intelligence research and its application to intelligent systems. It discusses hybridization of algorithms, new trends in neural networks, optimisation algorithms and real-life issues related to the application of artificial methods. The book constitutes the second volume of the refereed proceedings of the Artificial Intelligence and Algorithms in Intelligent Systems of the 7th Computer Science On-line Conference 2018 (CSOC 2018), held online in April 2018.

This book covers the complete spectrum of the fundamentals of clocked, regenerative comparators, their state-of-the-art, advanced CMOS technologies, innovative comparators inclusive circuit aspects, their characterization and properties. Starting from the basics of comparators and the transistor characteristics in nanometer CMOS, seven high-performance comparators developed by the authors in 120nm and 65nm CMOS are described extensively. Methods and measurement circuits for the characterization of advanced comparators are introduced. A synthesis of the largely differing aspects of demands on modern comparators and the properties of devices being available in nanometer CMOS, which are posed by the so-called nanometer hell of physics, is accomplished. The book summarizes the state of the art in integrated comparators. Advanced measurement circuits for characterization will be introduced as well as the method of characterization by bit-error analysis usually being used for characterization of optical receivers. The book is compact, and the graphical quality of the illustrations is outstanding. This book is written for engineers and researchers in industry as well as scientists and Ph.D students at universities. It is also recommendable to graduate students specializing on nanoelectronics and microelectronics or circuit design.

This book provides a comprehensive, single-source on resonant switched-capacitor converters. It is written in the style of a handbook, with systematic guidelines, and includes implementation examples. The authors explore integrated hybrid resonant DCDC converters in order to achieve highly compact, energy efficient and cost-effective power management solutions in the growing fields of wearables and internet-of-things applications. They provide an introduction into hybrid converters as a new and promising converter class, which merges capacitive and inductive conversion concepts into one. Coverage ranges from fundamentals to implementation details, including topics such as power stage design, gate drive schemes, different control mechanisms for resonant operation and integrated passives. Introduces a new, multi-ratio resonant converter architecture, which enables lower switching frequencies and better passive component utilization; Discusses circuit block design for high efficiency of the power stage; Explores implementation details and concepts for integrated passives; Derives models, implements and compares to each other different control mechanisms.

This new volume offers a broad view of the challenges of electronic devices and circuits for IoT applications. The book presents the basic concepts and fundamentals behind new low power, high-speed efficient devices, circuits, and systems in addition to CMOS. It provides an understanding of new materials to improve device performance with smaller dimensions and lower costs. It also looks at the new methodologies to enhance system performance and provides key parameters for exploring the devices and circuit performance based on smart applications. The chapters delve into myriad aspects of circuit design, including MOSFET structures depending on their low power applications for IoT-enabled systems, advanced sensor design and fabrication using MEMS, indirect bootstrap techniques, efficient CMOS comparators, various encryption-decryption algorithms, IoT video forensics applications, microstrip patch antennas in embedded IoT applications, real-time object detection using sound, IOT and nanotechnologies based wireless sensors, and much more.

Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology.

New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers. SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue. This monograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including: modeling of bugs and defects; stimulus generation for validation and test purposes (including timing errors; design for testability.

This first comprehensive account of high-dynamic-range (HDR) vision focuses on HDR real-time, high-speed digital video recording and also systematically presents HDR video transmission and display. While the book conveys the overall picture of HDR vision, specific knowledge of microelectronics and image processing is not required. In this book, experts share their knowledge in this rapidly evolving art related to the single most powerful of our senses.

Sigma-delta A/D converters are a key building block in wireless and multimedia applications. This comprehensive book deals with all relevant aspects arising during the analysis, design and simulation of the now widespread continuous-time implementations of sigma-delta modulators. The results of several years of research by the authors in the field of CT sigma-delta modulators are covered, including the analysis and modeling of different CT modulator architectures, CT/DT loop filter synthesis, a detailed error analysis of all components, and possible compensation/correction schemes for the non-ideal behavior in CT sigma-delta modulators. Guidance for obtaining low-power consumption and several practical implementations are also presented. It is shown that all the proposed new theories, architectures and possible correction techniques have been confirmed by measurements on discrete or integrated circuits. Quantitative results are also provided, thus enabling prediction of the resulting accuracy.